LLVM Weekly - #659, August 17th 2026
If you prefer, you can read the canonical version of this issue at https://llvmweekly.org/issue/659.
Welcome to the six hundred and fifty-ninth issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at https://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback via email: asb@asbradbury.org, or Mastodon: @llvmweekly@fosstodon.org / @asb@fosstodon.org, or Bluesky: @llvmweekly.org / @asbradbury.org.
News and articles from around the web and events
Braden Ganetsky blogged about a C++ bug in Clang and MSVC.
According to the LLVM Calendar in the coming week there will be the following:
- Office hours with the following hosts: Phoebe Wang, Johannes Doerfert.
- Online sync-ups on the following topics: Flang, vectorizer improvements, modules, lifetime safety, LLVM/Offload, Clang C and C++ language working group, OpenMP for flang, HLSL, reflection.
- For more details see the LLVM calendar, getting involved documentation on online sync ups and office hours.
On the forums
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Fabian Ritter reports that the memory model team for the AMDGPU backend has started work to formalize LLVM’s memory model for concurrent operations in Alloy.
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Anutosh Bhat kicked off an RFC discussion on an upstream WebAssembly execution path for MLIR.
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John McCall wrote about expectations for swiftcall implementations, noting that Swift considers the convention ABI unstable on platforms where they haven’t declared ABI stability.
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Ryan Buchner started a conversation on more accurate cost modeling for different RISC-V microarchitectures, with Simon Pilgrim sharing further thoughts on inaccuracies in TargetTransformInfo.
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Farzon Lotfi and other DirectX backed developers have proposed promoting it to an official target.
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LLVM 23.1.0-rc3 was released.
LLVM commits
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A SortedVectorMap was introduced and used for ProfileData, leading to large speedups for profile merging. 1e798c1, 5b3766a.
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MSP430 and Lanai now default to the new pass manager. 0c4f374, 6651a11.
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A scheduling model was added for HiSilicon’s hip12 AArch64 core. c6a18ac.
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Scaling problems with lit were addressed, meaning on a tested 64-core machine
check-llvmtime reduced from 105.2s to 48.4s. Partially this addresses a regression from moving between multiprocesspool and ProcessPoolExecutor, but the perforamcne does surpass the old setup. 9d69e21. -
Yet more docs were transitioned to Markdown. 11cffda.
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Lit learned to report results in WTT (Windows Test Technology) format. 54bea88.
Clang commits
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A skeleton for alias analysis at the ClangIR level was added. f3d0df9.
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__builtin_clear_paddingwas imlpemented for ClangIR. 52e3adee. -
A
readability-redundant-zero-initializerclang-tidy check was added. 5517668.