I have a function which is failing LLVMVerifyFunction with the following error:
Instruction does not dominate all uses!
%self = alloca ptr, align 8
%l_deref_self = load ptr, ptr %self, align 8
What is wrong here? Everything seems to be used in the order as it was declared and there is no branching so which instruction is not dominating? I’ve gotten that error before and it was always about breaks and branching so I’m very confused here.
I can post the entire module but it’s failing LLVMVerifyFunction so I don’t think it’s relevant.
Thanks!
define void @Nested(ptr dereferenceable(1) %0) {
entry:
%proc = alloca %TProc, align 8
%self = alloca ptr, align 8
store ptr %0, ptr %self, align 8
%1 = load ptr, ptr %self, align 8
%Ttest_3_Capturer_x = getelementptr inbounds %Ttest_3_Capturer, ptr %1, i32 0, i32 0
%alloc_temp = alloca %TProc, align 8
store ptr @IncBy, ptr %alloc_temp, align 8
%2 = load %TProc, ptr %alloc_temp, align 8
store %TProc %2, ptr %proc, align 8
%TProc_data = getelementptr inbounds %TProc, ptr %proc, i32 0, i32 1
%l_deref_self = load ptr, ptr %self, align 8
store ptr %l_deref_self, ptr %TProc_data, align 8
%TProc_kind = getelementptr inbounds %TProc, ptr %proc, i32 0, i32 2
store i8 2, ptr %TProc_kind, align 1
br label %return
return: ; preds = %entry
ret void
}