MLIR News, 57th edition (11th October 2023)

MLIR Newsletter
1

Welcome to the 57th issue of the MLIR Newsletter covering developments in MLIR, and related projects in the ecosystem. We welcome your contributions (contact: javed.absar@gmail.com). Click here to see previous editions.

Highlights and Ecosystem:

  • 2023 US LLVM Dev Meeting Oct 10th to 12th [Program].

MLIR Commits Past Two Weeks:

  • Nicholas V. added a minimal set of utils that allow implementing a simple transform dialect interpreter pass. [The Diff].

  • Matthias S. extended bufferization.materialize_in_destination to support memref destinations. This op can now be used to indicate that a tensor computation should materialize in a given buffer (that may have been allocated by another component/runtime). The op still participates in “empty tensor elimination”. This change also clarifies the meaning of the restrict unit attribute on bufferization.to_tensor ops.[The Diff].

  • Speed up FuncToLLVM using a SymbolTable [The Diff]. “We have a project where this saves 23% of the compilation time. This means using hashmaps instead of searching in linked lists.”

  • Banjamin added support for lowering vector.insert/extract of tile slices or elements to ArmSME MOVA intrinsics.[The Diff].

  • Mehdi improved MLIR Attribute::get() method efficiency by reducing the amount of argument copies (#68067) This ensures that the proper std::forward/std::move are involved, we go from 6 copy-constructions to 0 (!) on Attribute creation in release builds.[The Diff].

  • Aart Bik, " [mlir][sparse][gpu] add CSC to libgen GPU sparsification using cuSparse (#67713) Add CSC, but also adds BSR as a future format. Coming soon!".

  • Krzysztof Drewniak, “AMDGPU] Add packed 8-bit float conversion ops and lowering. Define operations that wrap the gfx940’s new operations for converting between f32 and registers containing packed sets of four 8-bit floats. Define rocdl operations for the intrinsics and an AMDGPU dialect wrapper around them (to account for the fact that MLIR distinguishes the two float formats at the type level but that the LLVM IR does not)”. [The Diff].

  • Andrzej W. [mlir][SME] Add vector.splat → SME conversion (#67659). This conversion is identical to vector.broadcast when broadcasting a scalar. [The Diff].

MLIR RFC Discussions

MLIR Ecosystem

Useful Links

1 Like