New intrinsic for masked vector compress without store

What would be the output of the intrinsic for the elements past the compressed range? I suspect there isn’t a consistent behavior across targets.

RISC-V can preserve the value from what was in the register before, but that would require an operand to the intrinsic to provide the source to preserve from. There’s no option to force them to 0 or other known value without another instruction to force the output register to known value first.

X86 can set the elements to 0 or preserve them, but again preserving would require a second input.

I don’t know about SVE.