Hi all,
I want to generate assembly code using Swing Modulo Scheduling in LLVM for many ALU (May could be Adders, multilayer …), I need some help how I can do that, which commend I run?
Also if possible more information about the scheduling and the register location …, and which pass responsible about that, and which LLVM version support Swing Modulo Scheduling.
Thank you.
Regards
Moh
Hi,
mohamed messelka via llvm-dev <llvm-dev@lists.llvm.org> writes:
Hi all,
I want to generate assembly code using Swing Modulo Scheduling in LLVM
for many ALU (May could be Adders, multilayer
......), I need some help how I can do that, which commend I run?
Also if possible more information about the scheduling and the register
location ......, and which pass responsible about that
and which LLVM version support Swing Modulo Scheduling.
I'm not sure if I am the right person to reply.
You can use MachinePipeliner which implements Swing Modulo Scheduling
from LLVM 6.0.
However, its target architecture is currently Hexagon only.
#I am creating a patch so that MachinePipeliner can be used for AArch64.
If you are building Clang/LLVM without specifying 'LLVM_TARGETS_TO_BUILD',
then I think that you can check the operation of MachinePipeliner as
follows:
% llc -march=hexagon -mcpu=hexagonv5 -enable-pipeliner
-debug-only=pipeliner < swp-vmult.ll
under llvm/test/CodeGen/Hexagon.
If your target machine is using 'ItineraryClasses' to describe the
machine model for scheduling, I think that MachinePipeliner using
'DFAPacketizer' is easy to use without additional work.
In the file 'llvm/include/llvm/Target/TargetSchedule.td', there is a
description of how to describe the schedule model of the target
machine.
Otherwise, you need to implement 'SwingSchedulerDAG::calculateResMII'
for managing hardware resources, 'SMSchedule::insert' for reserving
hardware resources, etc. in MachinePipeliner for your target machine.
Because MachinePipeliner implements Swing Modulo Scheduling, it
generates kernel code considering register pressure.
However, this does not guarantee that spill code will not be generated
in the kernel in the subsequent register allocation pass.
Therefore, when a loop body is large, it is necessary to divide the
loop considering hardware resources(for example, the number of
registers) of the target machine.
However, I do not think that there is a pass to execute its task now
properly.
Best regards,
Masaki Arai via llvm-dev <llvm-dev@lists.llvm.org> writes:
You can use MachinePipeliner which implements Swing Modulo Scheduling
from LLVM 6.0.
Sorry, we can use it from LLVM 4.0.
Best regards,