Suppose I have a target that does not have register+constant
addressing mode. Then, I have DAG like:
(store ..., (frameindex))
Targets like SPARC have the following patterns to catch this:
def ADDRri : ComplexPattern<i32, 2,
"SelectADDRri", [frameindex], >;
def STri : F3_2<3, 0b000100,
(outs), (ins MEMri:$addr, IntRegs:$src),
"st $src, [$addr]",
[(store IntRegs:$src, ADDRri:$addr)]>;
Where ADDRri will eventually turn into register+constant
addressing in assembler.
The IA64 target has explicit case in it's Select method
to handle frameindex -- which is fine, but I though I'd
try a fully declarative method, so I've added to sparc
def : Pat<(frameindex simm13:$val), (add G0, simm13:$val)>;
(Ignore bogus G0, and '13' -- just for testing). The error
I get this:
In anonymous.24: frameindex node requires exactly 0 operands!
Is this really as designed, or nobody got around to making frameindex
have an true operand? Any way to achive frameindex->add translation
using a pattern and not C++ code at all?