I would like to use Mem2Reg to eliminate the local variables, like this:
It’s a SystemVerilog source code.
nit: You can regard the following Verilog/SystemVerilog code as C++.
Before
module Foo;
int x, y;
always_comb begin
int a;
a = x + 1;
y = a;
end
endmodule
moore dialect IR
moore.module @Foo {
%x = moore.variable : !moore.i32
%y = moore.variable : !moore.i32
moore.procedure always_comb {
%a = moore.variable : !moore.i32
%0 = moore.constant 1 : !moore.i32
%1 = moore.add %x, %0 : !moore.i32
moore.blocking_assign %a, %1 : !moore.i32
moore.blocking_assign %y, %a : !moore.i32
}
}
After
module Foo;
int x, y;
always_comb begin
y = x + 1;
end
endmodule
moore dialect IR
moore.module @Foo {
%x = moore.variable : !moore.i32
%y = moore.variable : !moore.i32
moore.procedure always_comb {
%0 = moore.constant 1 : !moore.i32
%1 = moore.add %x, %0 : !moore.i32
moore.blocking_assign %y, %1 : !moore.i32
}
}
But this pass doesn’t work as I expected.
There is the related implementation of Op Interface Method.
I’m not sure at which stage the local variable(a) will be substituted with x+1. And why it doesn’t work. Please click (https://github.com/llvm/circt/pull/7082) to view a more detailed example.
Thanks for any help in advance.

