MLIR

Newsletter We will try to publish a weekly (or bi-weekly) newsletter about MLIR, trying to achieve what http://llvmweekly.org/ is doing for LLVM TCP-WG This category is intended to discuss the Development of high-level Tensor Compute Primitives dialect(s) and transformations Announcements This category contains important announcements about MLIR, in particular our weekly meetings. Deprecation & Important Refactoring This category collects recent areas of MLIR that are deprecated and other announcement about large breaking changes. Subscribe to stay tuned about coming changes!

Topic	Replies	Views	Activity
About the MLIR category MLIR	0	1988	November 8, 2019
[RFC] Tile Dialect and-or Dialect Reshuffle MLIR	5	106	June 10, 2023
[RFC] Scalable Vectorisation in Linalg MLIR	11	591	June 10, 2023
[RFC] Creating a ArmSME Dialect MLIR arm , arm64	80	1844	June 9, 2023
Understanding the semantics of reinterpret_cast MLIR	6	116	June 9, 2023
Visualize MLIR interactively MLIR llvm	2	100	June 9, 2023
[RFC] MLIR Pattern Matching for library and acceleration instruction rewriting MLIR	8	154	June 9, 2023
Parallelization of affine.for containing vector.transfer_write/read is not supported MLIR	4	62	June 8, 2023
Lowering Std, Affine, Vector Mix Operations to LLVM IR MLIR	1	45	June 8, 2023
Open MLIR Meeting 6/8/2023: Update on Numba/MLIR Announcements	1	186	June 8, 2023
Lowering ::mlir::memref::TensorStoreOp to LLVM IR MLIR llvm	4	185	June 8, 2023
How to change the print format of mlir::DenseElementsAttr MLIR	1	39	June 8, 2023
Parallelization of affine.for containing vector.transfer_write/read is not supported MLIR	0	22	June 8, 2023
MLIR News, 48th edition (7th June 2023) Newsletter	0	547	May 31, 2023
[RFC] Update to MLIR developer policy on recursion MLIR	23	881	June 7, 2023
How to get a value type's encoding in python bindings? MLIR	9	140	June 7, 2023
Calling functions on different modules MLIR	8	698	June 6, 2023
Converting TF to MLIR: why are dimensions forgotten? MLIR	2	330	June 6, 2023
In a ModuleOp pass how can I replace the top level ModuleOp? MLIR	9	90	June 6, 2023
RFC: Use Attributes to Model Distinct LLVM Metadata Nodes MLIR	15	477	June 6, 2023
Constructing pipeline lowering an affine parallel loop to NVIDIA GPU MLIR gpu	4	99	June 6, 2023
[RFC] Extending MLIR GPU device codegen pipeline MLIR llvm , gpu	53	1066	June 5, 2023
[RFC] OpenACC dialect data operation improvements MLIR	9	370	June 5, 2023
Reading data using external cpp file MLIR	17	292	June 5, 2023
[RFC][PSA?] Remove `vector.extractelement` and `vector.insertelement` ops in favor of `vector.extract` and `vector.insert` ops MLIR	2	74	June 5, 2023
Can block have name attribute? MLIR	1	52	June 5, 2023
Utilities for converting nested parallel loops (affine or scf) to multi-dimensional loops MLIR	4	96	June 3, 2023
Bus Error in MLIR/LLVM Compiler Pipeline MLIR llvm	3	90	June 3, 2023
[RFC] MLIR Bytecode: a stable serialization format MLIR	9	248	June 2, 2023
Check-mlir test suite times: Sparse tensor integration tests MLIR	9	138	June 2, 2023