Different stack offsets in asm and mcinst for same stores

Code Generation AArch64
1

Hi, I’ve a pass which changes the spill size and the offsets to stack pointer for the loads/stores to the spill slot in stack. I’ve been seeing some conflicting stores and while debugging I realized that the stack offset which are computed before emitting asm are getting changes/scaled in asm.
When I print the mcinst from a pass which is scheduled inside addPreEmit2, it prints the following stores:

STRWui $w9, $sp, 330
STRWui killed $w1, $sp, 332
STRXui killed $x0, $sp, 166

but in the asm or the objdump I see the following stores

str w9, [sp, #1320]
str w1, [sp, #1328]
str x0, [sp, #1328]

I’m trying to understand at what place these offsets are getting changed, I do not see any aarch64 pass scheduled after the pass where I printed the stores in mcinst?
(offsets getting changed from, 330 to 1320, 332 to 1328 and 116 to 1328)

Many thanks,

2

The representation reflects the instruction encoding: the immediate is multiplied by 4/8. So for encoding to binary, we just use the raw value. If you’re printing/parsing text, the asm printer/parser fixes the offsets.

You should be able to use AArch64InstrInfo::getMemOpInfo to look up the correct scaling.

3

Million thanks! fixes my issue. I was manually incrementing the imm and was not getting it right