InstAlias with tied operands - can it be supported?

Hello,

InstAlias does not allow tied operands (repeated operands) in the asm string to be matched.

It seems this situation is explicitly prevented in AsmMatcherEmitter.cpp:

    if (!Hack)
         PrintFatalError(TheDef->getLoc(),
                         "ERROR: matchable with tied operand '" + Tok +
                         "' can never be matched!");
       // FIXME: Should reject these. The ARM backend hits this with $lane in a
       // bunch of instructions. It is unclear what the right answer is.
   …

Is there a way to fix this limitation?

I would like to express: InstAlias<(opcode $rd, $rd, $rs1), (newopcode $rd, $rs1)>

Thank you,
Ana.

Hi,

On Instructions you can use checkEarlyTargetMatchPredicate() to check that the operands are the same. There's an example of that in MipsAsmParser.cpp for DATI and DAHI. I can't think of a reason TableGen couldn't be made to allow this for InstAlias too.

Hi Daniel,

I defined checkEarlyTargetMatchPredicate() to explicitly check for the tied operands, and it worked.

I could define an alias like: InstAlias<"oldOP $rd, $rd, $rs1", (NEWOP $rd, $rs1)>

However, I had to additionally change AsmMatcherEmitter 'Hack' variable setting to allow the repeated operand $rd in the AsmString.

Do you or anyone else know the history with this 'Hack' flag?

Thanks,
Ana.

diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp
index 1a820a5..252fd51 100644
--- a/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/utils/TableGen/AsmMatcherEmitter.cpp
@@ -1526,7 +1526,7 @@ void AsmMatcherInfo::buildInfo() {
        II->initialize(*this, SingletonRegisters, Variant, HasMnemonicFirst);

        // Validate the alias definitions.
- II->validate(CommentDelimiter, false);
+ II->validate(CommentDelimiter, true);

        Matchables.push_back(std::move(II));
      }

Hi,

Hi Daniel,

I defined checkEarlyTargetMatchPredicate() to explicitly check for the tied operands, and it worked.

I could define an alias like: InstAlias<"oldOP $rd, $rd, $rs1", (NEWOP $rd, $rs1)>

I think for some new Arm SVE instruction there is a related problem. Some instructions come with a constraint that the destination register must be the same as the first source data register. The example below is invalid, because z1 != z2.

   add z1, p0/m, z2, z3

Sander's approach to fixing that was adding a `tied` constraint, as well as extending the AsmMatcher to enforce those constraints during assembly parsing. The patch is here: https://reviews.llvm.org/D41446

I am not entirely sure if that would help your usecase, but I thought it might be helpful and it would be great if we could come up with a single way to handle those tied constraints :slight_smile:

Cheers,
Florian