About the Code Generation category
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4
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316
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January 11, 2022
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Emission of CFI directives, CFI_remember_state and CFI_restore state in the epilogue for RISC-V
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0
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4
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March 30, 2023
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RISC-V LLVM sync-up call 30th March 2023 (note daylight savings time impact)
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2
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32
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March 30, 2023
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[RFC/PSA] Changing the shadow call stack register on RISC-V
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3
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140
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March 30, 2023
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Representing buffer descriptors in the AMDGPU target - call for suggestions
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62
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668
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March 29, 2023
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[RFC] Let MVT generated and restore MVT into llvm/CodeGen
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0
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47
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March 27, 2023
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Finding PC address of a given machine instruction
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4
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76
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March 27, 2023
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[RFC] Let Intrinsics.td emit IIT_Info TypeSig
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4
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175
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March 26, 2023
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Building runtimes and builtins for RISC-V baremetal target (riscv64-unknown-elf)
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3
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113
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March 23, 2023
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RISC-V LLVM sync-up call 16th March 2023 (note daylight savings impact!)
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0
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71
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March 15, 2023
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GNU libgcrypt ATT asm style. Clang (llmv-as) doesn't pass autotool configure check unified asm code support
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2
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140
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March 15, 2023
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Adding restrictions on target independent opcodes in MIR
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5
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192
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March 15, 2023
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[RFC] Resolving issues related to extension versioning in RISC-V
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8
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438
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March 14, 2023
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Folding memory into FMA
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0
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53
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March 14, 2023
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Understanding the impact of instruction scheduling for modern desctop CPUs
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5
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178
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March 10, 2023
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Handling multiple exits in StructurizeCFG
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2
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60
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March 9, 2023
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RFC: Machine Pipeliner interface
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2
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115
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March 7, 2023
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Save some bits in TSFlags for X86
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0
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45
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March 7, 2023
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How to affect registers to make macro fusion happen
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2
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62
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March 7, 2023
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Legalizing: integer promotion with custom expand
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3
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50
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March 4, 2023
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Tablegen: add custom field to Instruction description
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2
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52
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March 3, 2023
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Global ISel
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7
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158
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March 3, 2023
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Using MacOS calling convention to call external functions
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4
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90
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March 2, 2023
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Global Isel?
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1
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102
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March 2, 2023
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Running passes added by addPassesToEmitFile() mutates a module
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2
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54
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March 2, 2023
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RISC-V LLVM sync-up call 2nd March 2023
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0
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95
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March 1, 2023
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SysV ABI non-power-of-two returns, motivation?
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0
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53
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February 27, 2023
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Handling PHIs in Uniformity Analysis
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3
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101
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February 23, 2023
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What do extra operands of COPY mean?
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4
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90
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February 22, 2023
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Why is REG_SEQUENCE lowered during TwoAddressInstructions?
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3
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86
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February 22, 2023
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