Topics tagged riscv

Topic	Replies	Views	Activity
How to resolve the issue with the 'R_RISCV_ALIGN' relocation in clang14.0.6? Beginners riscv , llvm	4	32	March 28, 2023
How to specify the default runtime library for clang links? Beginners riscv , runtime , llvm	4	72	March 27, 2023
Building runtimes and builtins for RISC-V baremetal target (riscv64-unknown-elf) RISCV riscv , runtime , libcxx	3	105	March 23, 2023
Ninja check-all failed for llvm12.0.0 Beginners riscv , llvm	1	68	March 18, 2023
How to describe the attribute of, the 'def-use' chain between implicit registers, of an intrinsic? Beginners riscv , clang	2	54	March 14, 2023
Is intrinsic with no-return incompatible with optimization -O2? Beginners riscv , clang	2	59	March 13, 2023
IR load and xor instruction pattern matching Beginners riscv	7	141	March 10, 2023
Why doesn't the assembler treat a macro as an immediate? Beginners riscv	2	41	March 4, 2023
Jump table generation with PIC Beginners riscv , clang , llvm	3	66	March 3, 2023
Adding riscv vector intrinsic to llvm Beginners riscv	5	124	February 28, 2023
Adding a 256 bit integer register class (i256) to the RISC-V backend Beginners riscv	2	125	February 27, 2023
C code snippets that generate instructions from bitmanip extension in LLVM-RISCV backend Beginners riscv , llvm	12	156	February 16, 2023
[Error] Converting LLVM IR to RISC-V Assembly LLVM Project riscv	2	87	February 15, 2023
How to build libcxx/libcxxabi for riscv target Runtimes riscv , libcxx	2	111	February 13, 2023
Building External Project: target "mlir_runner_utils" links to target "Terminfo::terminfo" but the target was not found MLIR riscv	12	107	February 12, 2023
Where is printMemref defined? MLIR riscv	4	66	February 11, 2023
Unable to compile rvv vector intrinsics with clang Beginners riscv , clang , llvm	4	126	February 9, 2023
Instruction Latency with the RocketSchedmodel Beginners riscv , llvm	1	55	February 7, 2023
Warnings while building LLVM Beginners riscv , llvm	1	62	February 7, 2023
Poor optimization of memory access to (no-byval indirect) aggregate value arguments IR & Optimizations riscv , clang	0	63	January 31, 2023
Why RISC-V v-extension requires m-extension as a support？ How is this function achieved?Where can I find its implementation? LLVM Project riscv	1	89	January 30, 2023
RISC-V Sign Extension Removal Comprehension Beginners riscv , clang , llvm	1	101	January 29, 2023
hasAllNBitUsers() should be modified to contain new instruction? Beginners riscv , clang , llvm	1	55	January 29, 2023
"Host compiler does not support '-fuse-ld=lld'" Error when running CMake command that used to work Beginners riscv , clang , llvm	4	351	January 28, 2023
Existing .cmake files errors that require manual update of them Beginners riscv , llvm	4	100	January 26, 2023
Adding New Test Cases for a New Instruction at LLVM-MC Beginners riscv , llvm	2	63	January 18, 2023
A question about riscv fence instruction Beginners riscv	10	149	January 12, 2023
Unable to build clang correctly for target riscv64-unknown-linux-gnu Using Clang riscv , clang , llvm	1	144	January 9, 2023
I have a question about instruction operands Beginners riscv	2	87	January 6, 2023
Error when adding Clang builtin to connect to LLVM intrinsic Clang Frontend riscv , clang , llvm	3	189	December 16, 2022