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About the RISCV category
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0
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404
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January 8, 2022
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[RFC] RISC-V: a target for software (interpreted) rather than hardware (executed)
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13
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374
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September 26, 2026
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RISC-V LLVM sync-up call September 24th 2026
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0
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37
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September 23, 2026
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Remove Ventana Conditional Ops and Veyron V1 Defintion
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3
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137
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September 10, 2026
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RISC-V LLVM sync-up call Septemer 10th 2026
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0
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37
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September 10, 2026
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CANCELLED RISC-V LLVM sync-up call August 27th 2026
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0
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48
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August 26, 2026
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Per Processor Costing for RISCV
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12
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586
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August 24, 2026
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RISC-V LLVM sync-up call August 13th 2026
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0
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69
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August 13, 2026
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CANCELLED RISC-V LLVM sync-up call July 30th 2026
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0
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71
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July 29, 2026
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RISC-V LLVM sync-up call July 16th 2026
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0
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78
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July 15, 2026
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RISC-V LLVM sync-up call July 2nd 2026
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0
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104
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July 1, 2026
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[RFC] CORE-V (XCV) support for CV32E40P: Clang builtins, XCVsimd intrinsics, and generic auto-selection
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8
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404
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June 29, 2026
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CANCELLED RISC-V LLVM sync-up call June 18th 2026
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0
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88
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June 17, 2026
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RISC-V LLVM sync-up call June 4th 2026
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0
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76
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June 3, 2026
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CANCELLED RISC-V LLVM sync-up call May 21st 2026
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0
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76
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May 20, 2026
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RISC-V LLVM sync-up call May 7th 2026
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0
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113
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May 6, 2026
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[RFC] Remove codegen support for trivial VP intrinsics in the RISC-V backend
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17
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989
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May 1, 2026
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RISC-V LLVM sync-up call April 23rd 2026
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0
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82
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April 22, 2026
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Promoting load/something/store to atomics on single-hart virtual target
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2
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134
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April 17, 2026
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RISC-V LLVM sync-up call April 9th 2026
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0
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71
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April 8, 2026
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[RFC] RISC-V ropi-rwpi profile with gp-based runtime data addressing
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5
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335
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April 2, 2026
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CANCELLED RISC-V LLVM sync-up call March 26th 20206
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0
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63
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March 25, 2026
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RISC-V LLVM sunc-up call March 12th 20206 NOTE DAYLIGHT SAVINGS IMPACT
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0
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58
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March 11, 2026
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Question about Code Gen on a benchmark
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5
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225
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March 10, 2026
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Possible bug with tail-call and indirect argument
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2
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177
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March 6, 2026
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CANCELLED RISC-V LLVM sync-up call February 26th 2026
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0
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58
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February 25, 2026
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Customize the RiscV ASM generation
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3
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148
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February 25, 2026
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Question about RiscVAsmPrinter
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2
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115
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February 24, 2026
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RISC-V LLVM sync-up call February 12th 2026
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0
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70
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February 11, 2026
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RISC-V LLVM sync-up call January 29th 2026
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0
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76
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January 28, 2026
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