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RFC: [X86][Intel] Remove all-end supports of Intel knl/knm/mic_avx512 targets
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5
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105
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May 30, 2023
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Target-features, target-cpu, LLVM, Clang and general confusion
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1
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71
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May 29, 2023
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Problems in the transformation from LLVM IR code to x86-64 executable file
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9
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82
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May 27, 2023
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How to put Large const data to .lrodata on Linux x86_64 (mcmodel)
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1
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284
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May 25, 2023
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Unable to build LLVM release/16.x on Ubuntu inside VirtualBox
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4
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127
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May 1, 2023
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Clang built kernel fails to generate coredump file SEGV signal
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1
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90
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April 11, 2023
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Integrated as: Differing behaviour in intel and at&t syntax modes
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1
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148
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February 4, 2023
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UB is bizarre in this case
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2
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241
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January 16, 2023
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Help with LLVM standalone cross-compiler build
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6
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411
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December 15, 2022
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[RFC][LLC] Add ExpandLargeIntFpConvert pass for fp-int-conversion of large _BitInt
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2
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234
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November 2, 2022
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Using BuildMI to build X86_64 instructions
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2
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500
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October 13, 2022
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Llvm Pass for instrumenting code at the Assembly level
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4
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237
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October 6, 2022
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Code compiled for arm64 much slower than for x86_64
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16
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773
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October 4, 2022
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Bad codegen for handrolled unaligned write
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3
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161
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August 26, 2022
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Code Generation for XRay Custom Events
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0
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101
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June 19, 2022
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How to spill a register in fast RA if the spilling will create another temp register
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3
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229
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May 18, 2022
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Always extend the integer parameters of callee
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9
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365
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April 6, 2022
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Create new jump intrinsic
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4
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221
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April 5, 2022
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Vector ABI and min-legal-vector-width
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4
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423
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March 3, 2022
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"Preserve none" calling convention
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0
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181
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February 16, 2022
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Compiling LLVM C++ library for x86 architecture
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12
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787
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February 15, 2022
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Using LLVM's MCAsmParser/MCx86AsmParser
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2
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149
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February 11, 2022
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