RFC: [X86][Intel] Remove all-end supports of Intel knl/knm/mic_avx512 targets
|
|
5
|
105
|
May 30, 2023
|
Target-features, target-cpu, LLVM, Clang and general confusion
|
|
1
|
71
|
May 29, 2023
|
Problems in the transformation from LLVM IR code to x86-64 executable file
|
|
9
|
82
|
May 27, 2023
|
How to put Large const data to .lrodata on Linux x86_64 (mcmodel)
|
|
1
|
284
|
May 25, 2023
|
Unable to build LLVM release/16.x on Ubuntu inside VirtualBox
|
|
4
|
127
|
May 1, 2023
|
Clang built kernel fails to generate coredump file SEGV signal
|
|
1
|
90
|
April 11, 2023
|
Integrated as: Differing behaviour in intel and at&t syntax modes
|
|
1
|
148
|
February 4, 2023
|
UB is bizarre in this case
|
|
2
|
241
|
January 16, 2023
|
Help with LLVM standalone cross-compiler build
|
|
6
|
411
|
December 15, 2022
|
[RFC][LLC] Add ExpandLargeIntFpConvert pass for fp-int-conversion of large _BitInt
|
|
2
|
234
|
November 2, 2022
|
Using BuildMI to build X86_64 instructions
|
|
2
|
500
|
October 13, 2022
|
Llvm Pass for instrumenting code at the Assembly level
|
|
4
|
237
|
October 6, 2022
|
Code compiled for arm64 much slower than for x86_64
|
|
16
|
773
|
October 4, 2022
|
Bad codegen for handrolled unaligned write
|
|
3
|
161
|
August 26, 2022
|
Code Generation for XRay Custom Events
|
|
0
|
101
|
June 19, 2022
|
How to spill a register in fast RA if the spilling will create another temp register
|
|
3
|
229
|
May 18, 2022
|
Always extend the integer parameters of callee
|
|
9
|
365
|
April 6, 2022
|
Create new jump intrinsic
|
|
4
|
221
|
April 5, 2022
|
Vector ABI and min-legal-vector-width
|
|
4
|
423
|
March 3, 2022
|
"Preserve none" calling convention
|
|
0
|
181
|
February 16, 2022
|
Compiling LLVM C++ library for x86 architecture
|
|
12
|
787
|
February 15, 2022
|
Using LLVM's MCAsmParser/MCx86AsmParser
|
|
2
|
149
|
February 11, 2022
|