LLVM Weekly - #487, May 1st 2023
If you prefer, you can read a HTML version of this email at http://llvmweekly.org/issue/487.
Welcome to the four hundred and eighty-seventh issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at http://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to asb@asbradbury.org, @llvmweekly or @asbradbury on Twitter, or @llvmweekly@fosstodon.org or @asb@fosstodon.org.
News and articles from around the web and events
nlvm, an Nim language frontend for LLVM has been released. The author provided a summary.
GCC 13.1 was released.
According to the LLVM calendar in the coming week there will be:
- Office hours with the following hosts: Tobias Grosser, Kristof Beyls, Quentin Colombet, Johannes Doerfert.
- Online sync-ups on the following topics: Flang, OpenMP, Clang C/C++ language working group, loop optimisation, OpenMP for flang, MLIR, HLSL, SPIR-V, MLGO, GPU.
- For more details see the LLVM calendar, getting involved documentation on online sync ups and office hours.
On the forums
-
Wang Pengcheng proposed introducing functions and lambdas into TableGen, pointing to RISC-V vector scheduling as a motivating use case.
-
The dates for the US LLVM Developersâ Meeting havenât been announced yet, but Tanya Lattner indicates the current goal is to hold it in October.
-
Daniel Thornburgh started a discussion about supporting linker section packing in LLD. tannewt gave some insight on how this could be used in the context of CircuitPython.
-
Aiden Grossman initiated a discussion on platform support required for llvm-exegesis.
-
William Junda Huang proposed deprecating the compact binary sample profile format.
-
In response to a question, Kiran Chandramohan summarised the status of OpenMP in MLIR.
LLVM commits
-
SamplePGO gained a new algorithm to perform better when input profiles are stale. a98d6a1, 892daed.
-
The
!range
operator was added to TableGen. ab2187d. -
Utility functions were introduced for converting between EBCDIC and UTF-8. b42718d.
-
The âadding a builderâ documentation was updated. 73f4f56.
-
The âcompiler launcherâ (e.g. ccache) is now disabled on external projects and for the later stages of a multi-stage clang build. As these build steps use a fresh from-source toolchain build, they pollute the build cache with no chance of speeding things up. e38cdc5.
-
MachineValueType.h is now fully generated and
IIT_Info
was moved to Intrinsics.td. ddaf085, c49f850. -
llvm.is.fpclass is now custom-lowered for RISC-V. 5b869f3.
-
powi, log, and frem are now handed in computeKnownFPClass. 8e72219, 2ff52ea, de7bfec.
-
Vector strict rounding operations are now supported on RISC-V. 1855c0a.
-
The
preserve_all
calling convention was added for AArch64. d75e70d. -
denormal-fp-math
now has a âdynamicâ option. bc37be1. -
-fsanitizer=kernel=memory
was enabled for SystemZ. a3e56a8.
Clang commits
-
LoongArch multiarch triples are now supported in the Clang driver. 61fee67.
-
Stale projects were removed from the Clang open projects page, and some new projects added. 5e10cd7, f0630a3.
-
Gather intrinsics descriptions were added to avx2intrin.h. 039ae62.
-
__attribute__((interrupt("user")))
is no longer supported for RISC-V. This was part of the âNâ extension that didnât make it into the ratified privileged specification. 05d0cae. -
Flag output inline asm constraints on AArch64 are now supported. 4ab76b7.
-
The
riscv_rvv_vector_bits(N)
attribute was added, based on AArch64arm_sve_vector_bits
. 42e79d9.
Other project commits
-
An integer bitwidth narrowing pass was added to MLIR, as well as a generic mem2reg implementation. da0730b, f88f8fd.
-
A GDB/LLDB interface was added for interactive debugging of MLIR actions. 1020150.
-
A CI job was added for pstl in libcxx. 2445603.
-
Short-range thunk support was added for AArch64 in LLD. d0cdc5d.