OpenASIP, also known as TTA-based Co-Design Environment (TCE), is an
open source application-specific instruction-set processor (ASIP)
toolset for design and programming of customized co-processors
(compiler-programmable accelerators). It is based on the static energy
efficient Transport Triggered Architecture (TTA) processor template.
The toolset provides a complete retargetable LLVM-based compiler
supported co-design flow from high-level language programs down to
FPGA/ASIC synthesizable processor RTL (VHDL and Verilog generation
supported) and instruction-parallel program binaries.
The size and quantity of register files, function units, supported
operations, and the interconnection network can be freely customized to
create new co-processors ranging from small single-application specific
cores with special operations to more general multi-issue domain-
specific processors.
Notable Changes