[RFC] Creating a ArmSME Dialect

MLIR
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Hi Frank,

Sorry about the delay in responding.

This discussion has already helped us a lot to better understand various SME related challenges, thank you!

I am by no means against an “Arm SME” dialect, but my overall feeling is that this RFC/proposal is trying to address too many questions at once. It’s already quite long, and we keep adding new ideas/challenges :slight_smile: I suggest that we split this discussion into two:

  • targeting SME from MLIR (e.g. how to get from Linalg to SME),
  • “Arm SME” dialect design/proposal (this should be an implementation detail informed by the above).

The former will require much more than just an “Arm SME” dialect. For example, the following discuss some key aspects of the SME ISA, but don’t require a dialect:

Both these proposals get us closer to better understanding how and what code would be generated for SME (and also for SSVE, which is equally important for us).

For the tile allocation, I am really hoping that we can leverage the existing abstractions in MLIR, e.g. Linalg and Vector dialects, tiling and vectorisation logic, etc. IMHO, we should explore this more.

In general, I feel that we are making good progress, but it would help if we switched to more focused discussions. If we wish to continue brainstorming about the overall design, then could we either create a new thread or rename this one (as e.g. “Supporting SME in MLIR”)?

-Andrzej

Btw, we discussed SME extensively last week during EuroLLVM and we agreed that this would be fine for our first prototype, but we should be open/prepared to extending this in the future:

I’ll try to post more notes in the roundtable thread: https://discourse.llvm.org/t/eurollvm-2023-roundtable-targeting-cpus-from-ml-frameworks/ (sorry, haven’t had the time yet).

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