[RFC] Let Intrinsics.td emit IIT_Info TypeSig

[chapuni]

I have noticed that logics of generating TypeSig in IntrinsicEmitter can be migrated to Intrinsics.td, with a few enhancements in TableGen, while working on TableGen.

Issues in llvm-tblgen -- High-parallelized build

Let me introduce issues around building LLVM with manycore system. At first, let’s discuss llvm-tblgen. Abstract Data have been measured on AWS c6a.48xlarge, 192 vcpus. LLVMCore LLVMCore (c6a.48xlarge) · GitHub clangBasic clangBasic (c6a.48xlarge) · GitHub test-depends (large) https://gist.github.com/chapuni/aae5c61e4ba0eb1b457ab8a9680b4eac I use GitHub - nico/ninjatracing: Convert .ninja_log files to chrome's about:tracing format. (Perfetto UI can accept .ninja_log but I don’t like it…

My motivation is to let IntrinsicEmitter free from MachineValueType.h and migrate other CodeGen emitters to another TableGen like llvm-cg-tblgen. I have noticed that MVT is mostly used in the logic of TypeSig in IntrinsicEmitter.

I would like to propose changes along steps below.

1. Preparations
   • Split out CodeGenIntrinsics from CodeGenTarget. ⚙ D143844 llvm-tblgen: Split out CodeGenIntrinsics.cpp from CodeGenTarget.cpp
   • Change sort order of TableGen’s getAllDerivedDefinitions() as numeric order. Character order causes instability when anonymous records are increased or decreased due to wrapping-around issue. ⚙ D145874 TableGen: Let getAllDerivedDefinitions() numeric order.
   • Enhance TableGen to be able of index accessing of list.
     • Introduce !range list generator. ⚙ D145871 TableGen: Introduce `!range` operator for half-opened interval
     • Let expressions available to list subscriptions. ⚙ D145872 TableGen: Let expressions available to list subscripts and list slices
2. Enhance ValueTypes.td to have more information like isVector and ElementType etc.
   • [Future plan] Let TableGen emit MachineValueType.h with ValueTypes.td.
3. Move constants to Intrinsics.td and emit them to generated headers.
   • ArgKind – It is defined in Intrinsics.h and used in IntrinsicEmitter as naked constants. ⚙ D145873 Move definitions of ArgKind from Intrinsics.h to Intrinsics.td
   • IIT_Info – It is defined in both IntrinsicEmitter.cpp and Function.cpp
4. Implement the generator of TypeSig
   • Prune TypeSig stuff in IntrinsicEmitter.cpp

Each differential is expected to be applicable to main. Feel free to revise my English sentences in comments and documents.

The prototype is Commits · chapuni/llvm-project · GitHub This includes my differentials above.
See also the squashed differential, ⚙ D145937 Replace `IntrinsicEmitter::ComputeFixedEncoding()` and cleanup

Although I haven’t chosen reviewers to my differentials yet, I am happy if guys would nominate reviews for them.

Thank you.

[chapuni]

FYI, I have created a squashed differential as ⚙ D145937 TableGen: Let Intrinsics.td emit TypeSig
It includes prestage commits, ValueTypes and IIT_Info.

[arsenm]

@chapuni

Enhance ValueTypes.td to have more information like isVector and ElementType etc.

• [Future plan] Let TableGen emit MachineValueType.h with ValueTypes.td.

I think we should move towards using LLT as the base machine type. We do need to add some features, like the ability to represent different FP types with the same size.

[chapuni]

I was focusing to IntrinsicEmitter, that uses MVT. I think we could restore llvm/CodeGen/MachineValueType.h at the first step.

I will look around LLT later. Thank you.

[chapuni]

I have made this as the last point of the series. ⚙ D145937 Replace `IntrinsicEmitter::ComputeFixedEncoding()` and cleanup

(I didn’t know I could create series of patches in the phab)

[chapuni]

D145937 has landed as llvmorg-17-init-9368-g24706aff15c1
Thanks to @arsenm for your reviews!