RISC-V LLVM sync-up call 26th Sep 2019

For background on these calls, see

Reminder: the purpose is to co-ordinate between active contributors.
If you have support questions etc then it's best to post to llvm-dev.

We have a call each Thursday at 4pm BST, via

It's a pretty quiet week with various people being away or travelling,
but things to discuss include:

* LLVM 9.0 was released with RISC-V as an official backend - hurray!
Thank you to all contributors
* Target-specific scheduling model - any updates from those working on this?
* Update on buildroot testing - Luis has been picking up this work
again, to provide litmus tests on a large corpus
* Immediate materialisation optimisations:
⚙ D68060 [RISCV] Materialization of 64-bit mask immediate - can be a win for code size too
* Splitting SP adjustment ⚙ D68011 [RISCV] Split SP adjustment to reduce the offset of callee saved register spill and restore Shiva's
patch seems like a really helpful optimisation and has had a
reasonable amount of review. More eyes always welcome.
* R_RISCV_RELAX_NORVC proposed relocation type - see the psABI
discussion at Add relocation `R_RISCV_RELAX_NORVC` for linker relaxation. by Nelson1225 · Pull Request #116 · riscv-non-isa/riscv-elf-psabi-doc · GitHub
The LLVM community should feed back on this
* Anything else (as usual, always helpful to drop me an email ahead of
time to add to the agenda - but feel free to list things here)