The AVX saga continues.
I am attempting to write a pattern for VEXTRACTF128 but am having some
problems. My attempt looks something like this:
defm EXTRACTF128 : avx_fp_extract_vector_osta_node_mri_256<0x19, MRMDestReg,
MRMDestMem, "extractf128", undef, X86f32, X86i32i8,
// rr
[(set VR128:$dst,
(v4f32 (vector_shuffle
(v8f32 undef), (v8f32 VR256:$src1),
VEXTRACTF128_shuffle_mask:$src2)))]>;
(This is simplified for the sake of exposition but this gets the idea across).
TableGen reports a type contradition:
VEXTRACTF128_256mri: (st:isVoid (vector_shuffle:v4f32 (undef:v8f32),
VR256:v8f32:$src1, (build_vector)<<P:Predicate_VEXTRACTF128_shuffle_mask>>:
$src2), addr:iPTR:
$dst)<<P:Predicate_unindexedstore>><<P:Predicate_store>><<P:Predicate_alignedstore>>
tblgen: In VEXTRACTF128_256mri: Type inference contradiction found in node
vector_shuffle!
Well, it's right! So how do I express this kind of thing? Since LLVM 2.5
shufflevector supports creating a vector of a difference size than the
inputs. Which is exactly what we need for VEXTRACTF128 and VINSERTF128.
-Dave