Hello LLVM-Experts,
working on a personal Rust project for the PlayStation 1, we noticed that a specific setup can generate code that is not correct for the MIPS1 target. Together with Cody we had a deep dive into what exactly happens.
To cut a long story short, we found out that MIPS1 load delay slots are not respected when the load is happening in a branch delay slot. Further we identified that the issue is setup during the CodeGen Prepare opt pass. However we do not know enough about this optimization pass nor any optimization pass to know where exactly to start…
We know that MIPS1 is not a very popular target so we are very keen on wanting to fix it ourself - we are just low on time and experience. So any help understanding where to start is welcome. Starting is quite difficult, so far we just have been users of the LLVM.
More details can be found in the Issue here.