Mips :delay slot filler with store.

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1

Hi All,

For the below C code

Test.u32pt = u32PtLen;
Test.u32pn = u32PtCnt;
Test.pstpk = pstPt;
Test.psteo = pstEgrInfo;
Test.e = 1;
Test.pstfi = pstFi ;

return foo(&Test, AclAction);

where “Test” is the struct type .

the generated code for mips (with -fno-delayed-branch) :

Test.u32pt = u32PtLen;
370: afb50084 sw s5,132(sp)
Test.u32pn = u32PtCnt;
374: afb60080 sw s6,128(sp)
Test.pstpk = pstPt;
Test.psteo = pstEgrInfo;
Test.e = 1;
Test.pstfi = pstFi ;

return foo(&Test, AclAction)
378: 0c000000 jal 0 <FSVC_Egr_L4ACLfoo>
37c: 00000000 nop

with -fdelayed-branch(gcc 4.8.1) the generated code is

Test.u32pt = u32PtLen;
370: afb50084 sw s5,132(sp)
Test.pstpk = pstPt;
Test.psteo = pstEgrInfo;
Test.e = 1;
Test.pstfi = pstFi ;

return foo(&Test, AclAction)
378: 0c000000 jal 0 <FSVC_Egr_L4ACLfoo>
Test.u32pn = u32PtCnt;
374: afb60080 sw s6,128(sp)

can filler place the “sw s6,128(sp)” in the delay slot ,is
that legal and if not why it so ?

Thank you
~Umesh

2

Hi Umesh,

You can find the MIPS ISA documentation at Imagination's MIPS32 architecture. The restrictions section for the sw instruction doesn't specify any prohibition on sw being in the delay slot.