Incubator

CIRCT The Circuit IR Compilers and Tools (CIRCT) project aims to apply MLIR and the LLVM development methodology to the domain of hardware design tools. The EDA industry has well-known and widely used proprietary and open source tools. However, these tools are often inconsistent, have usability concerns, and were not designed together into a common platform. We believe that open source design tools leveraging multiple abstractions designed around a coherent framework like MLIR can radically disrupt this industry, in the same way that open source compilers now dominate the software tool industry. Enzyme The Enzyme project is a tool that takes arbitrary existing code as LLVM IR and computes the derivative (and gradient) of that function. torch-mlir This category is intended for questions, discussions, proposal, etc. about the mlir-npcomp incubator project, a MLIR based compiler toolkit for numerical python programs, hosted at: https://github.com/llvm/mlir-npcomp/

Topic	Replies	Views	Activity
About the Incubator category Incubator	0	780	August 21, 2020
Best practices / flags for firtool when targeting Formal Equivalence Checking (SEC) with JasperGold CIRCT	1	67	October 23, 2026
[RFC] UHDI: a JSON debug-info document emitted from the Debug dialect CIRCT rfc , debuginfo , mlir	3	276	October 22, 2026
Stage-aware structural analysis of Arc simulation workloads: initial results and questions CIRCT llvm , mlir	3	169	October 2, 2026
[RFC] Resolving SystemVerilog Net vs. Var and Port Semantics in CIRCT CIRCT	0	198	September 18, 2026
EnzymeCon3 Planning Survey Enzyme	0	67	September 2, 2026
UHDI (Unified Hardware Debug Info): structured debug-info export for Chisel/FIRRTL CIRCT rfc , debuginfo , mlir	3	341	August 30, 2026
[RFC] A Core-Level Probe Dialect CIRCT rfc	7	413	August 5, 2026
[RFC] AXI4 Dialect CIRCT	5	506	August 5, 2026
[torch-mlir] Where should QDQ fusion live for the new quantized_decomposed ODS ops torch-mlir	2	144	July 31, 2026
Passing Chisel information to Firrtl and emit debug info for the Tywaves waveform viewer CIRCT debuginfo	13	846	June 8, 2026
[RFC] RVCC: An LLVM Incubator for High-Performance RISC-V Compiler Optimizations Incubator riscv	18	1490	April 24, 2026
CIRCT Project Policy on Contributions from thomasnormal/circt Fork CIRCT	3	833	March 18, 2026
Failed to legalize operation 'seq.firmem' CIRCT mlir	2	205	March 6, 2026
Is there a way to externalize weights in torch-mlir output? torch-mlir	8	378	March 3, 2026
Require Pull Requests for all CIRCT commits CIRCT	0	175	February 25, 2026
How to lower tm_tensor.attention to linalg (linalg on tensors backends) by torch-mlir? torch-mlir affine , mlir	6	323	February 15, 2026
PIP install `torch-mlir` downloads never-ending number of variations torch-mlir	6	488	February 13, 2026
Are there any examples of using Enzyme with llvm flang (aka flang-new)? Enzyme	0	115	January 16, 2026
Handshake-to-hw lowering with buffers CIRCT	1	152	December 19, 2025
CIRCT: exported verilog from mlir can't be synthesized with yosys CIRCT mlir	3	321	November 26, 2025
[Job Ad] Cambridge PhD Position on CIRCT \| Apply before Dec 3rd CIRCT	0	293	October 31, 2025
Query related to operations like sv.assign CIRCT	1	143	September 25, 2025
Why my torch-mlir can do nothing? torch-mlir	0	204	September 4, 2025
DC simulation CIRCT	2	310	August 21, 2025
Integration with ABC optimizer CIRCT	9	1676	June 23, 2025
Lowering From LTL to Core CIRCT	3	341	May 12, 2025
Firtool v1.114.1 segmentation fault with Chisel 7.0.0-RC1 CIRCT	8	563	May 9, 2025
Dealing with files emitted by addResource / HGLDD in firtool CIRCT	3	206	April 29, 2025
CIRCT: Lowering Upstream MLIR into Verilog CIRCT mlir	10	1012	March 19, 2025