Now, we have some new arm64 targets supported SVE, whose vector register width may be larger than 128. For example, if the
vscale=4for a special target, the type
<vscale x 4 x i32>is actually the same as
<16 x i32>, ie. its corresponding fixed vector width is 512-bit.
We have already defined calling convention for
scalable vector typesand
fixed vector types, whose vector register width is less or equal to 128-bit, but we have not defined the calling convention for
these fixed vector types, whose vector register width is larger than 128. See
So my question is, should we supplement the calling conventions for these data types, whose vector register width is larger than 128 ? For example, I come across a related compile issue record on [AArch64] compile crash on "Call operand has unhandled type" · Issue #69694 · llvm/llvm-project · GitHub.