I’m trying to setup a test case for a new instruction I defined in TableGen in RISC-V. The instruction is a simple combined shift and xor instruction. llc recognizes the DAG and outputs the correct Assembly but I want to implement a test case for it in CodeGen and MC.
Below is the file I added to the test directory:
# RUN: llvm-mc %s -triple=riscv32 -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv32 < %s \
# RUN: | llvm-objdump -riscv-no-aliases -d -r - \
# RUN: | FileCheck -check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: shlxor a0, a1, a2
# CHECK-ASM: encoding: [0x33,0x85,0xc5,0xfe]
shlxor a0,a1,a2
I’ve seen that llc test cases have an update utility, I wondered if llvm-mc test cases can be updated similarly. Is there any other way to fill the correct encoding value at “CHECK-ASM” than writing by hand?