Cleanly Addressing GlobalISel/DAG Pattern Matching Differences

Code Generation
14

What I meant is that, in the pattern above:

def : AMDGPUPat <
  (DivergentBinFrag<xor> i32:$z, (and i32:$x, (xor i32:$y, i32:$z))),
  (V_BFI_B32_e64 VSrc_b32:$x, VSrc_b32:$y, VSrc_b32:$z)
>;

A typical problem is that we can’t match the “and” because the “xor” RHS has a COPY before the and.
We need a way to ignore this copy before GISel attempts to match the XOR.

So by “in-between”, I meant that we would need something that will run on the xor, the and, and the other xor so it can “pre-process” the operands before GISel attempts to match the next instruction.

I see that there is ⚙ D86294 AMDGPU/GlobalISel: Add tablegen operator that looks through copies would that be an adequate solution for you?
I will check if the patch author has any intention to resume work & land it, otherwise I could take over it then.