I'm relatively new to LLVM and I would like to implement a feature, so I want your advice on its feasibility and difficulty. I want the code generator to support such code :
%1 = ; <4 x float> vector
%2 = ; <4 x float> vector
%3 = fcmp ogt <4 x float> %1, %2
%4 = bitcast <4 x i1> %3 to i4
%5 = zext i4 %4 to i32
and generate a movmskps instruction (correct me if it's not possible). So the code generator would have to find such pattern (fcmp followed by a bitcast and/or zext) and generate correct assembly (using movmskps or a slower code path). Currently, LLVM 3.3 seems to generate wrong code (see bug 17479 : http://llvm.org/bugs/show_bug.cgi?id=17479).
I've looked a little through the code and in particular in the selection dag for x86, but I don't know where to start.
Thank you in advance,
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