post-inc loads/stores

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1

Hi,

I would like to know how I should define these types of instructions in LLVM.

I have for instance a load instruction that increments the address-register. I do not know how I should mark this - should the address register as well be in the outs list, or should some other flag be set, perhaps?

Thank you,

/Jonas

2

Hi Jonas,

There's not really a very clean way to do this currently. The ARM backend does it as you indicate with the writeback register listed as an output as well as an input and marked as a tied operand constraint. Search for _PRE and _POST in ARMInstrInfo.td for examples. For most instances, instruction selection is done via custom lowering, not an ISel pattern on the pattern; see ARMISelLowering.cpp for that.

-Jim

3

Hello Jonas,

I have for instance a load instruction that increments the address-register.
I do not know how I should mark this - should the address register as well
be in the outs list, or should some other flag be set, perhaps?

You might consider looking into ARM and MSP430 backends for examples.

4

Specifically, there is no way to use a pattern in the .td file for an instruction that produces multiple results. That is why the updating loads are selected with custom C++ code.

For updating stores, the updated address is the only result and they can generally be selected from patterns in the .td files.