[RFC] Tensilica Xtensa (ESP32) backend

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Dear LLVM Community,

A few weeks ago, I published updated patches of the Xtensa Architecture backend for review. During this time, the 2nd patch was approved, and I am very happy about it .

Current situation is that first three patches are approved:

  1. Recognize Xtensa in triple parsing code ⚙ D64826 [Xtensa 1/10] Recognize Xtensa in triple parsing code. .
  2. Add Xtensa ELF definitions ⚙ D64827 [Xtensa 2/10] Add Xtensa ELF definitions. .
  3. Initial version of the Xtensa backend ⚙ D64829 [Xtensa 3/10] Add initial version of the Xtensa backend. .

And the last seven patches not yet have been reviewed.
I would like to ask everyone to help with reviewing following patches.

  1. Add basic *.td files with Xtensa architecture description ⚙ D64830 [Xtensa 4/10] Add basic *td files with Xtensa architecture description. .
  2. Add Xtensa MCTargetDescr initial functionality ⚙ D64831 [Xtensa 5/10] Add Xtensa MCTargetDescr initial functionality. .
  3. Add Xtensa basic assembler parser ⚙ D64832 [Xtensa 6/10] Add Xtensa basic assembler parser. .
  4. Add Xtensa instruction printer ⚙ D64833 [Xtensa 7/10] Add Xtensa instruction printer. .
  5. Add support of the Xtensa shift / load / store / move and processor control instructions. ⚙ D64834 [Xtensa 8/10] Add support of the Xtensa shift/load/store/move and processor control instructions. .
  6. Add basic support of Xtensa disassembler ⚙ D64835 [Xtensa 9/10] Add basic support of Xtensa disassembler. .
  7. Add relaxations and fixups. Add rest part of Xtensa Core Instructions. https://reviews.llvm.org/D64836 .

I would be glad to receive any comments or feedback about them.

Thanks to all! Best regards,
Andrei Safronov