RISC-V LLVM sync-up call August 3rd 2023

For background on these calls, see here.

Reminder: the purpose is to coordinate between active contributors. If you have support questions etc then it’s best to post to LLVM’s Discourse or Discord.

We have a call every alternate Thursday at 4pm BST. If you have topics to discuss, please email me ahead of time or add to the agenda.

Attendees are required to adhere to the LLVM Code of Conduct For any Code of Conduct reports, please contact me, and also email conduct@llvm.org.

Dial-in details:

We have a shared calendar that may help in keeping track, which is
accessible through:

Agenda (copied from the linked doc - if you have additional items please add them):

  • LLVM 17 (rc2 due Aug 8th) - backports not covered elsewhere
    • Minor ABI fix D142327
      • Reverted just before the branch due to a last minute bug. Now resolved and awaiting re-review
    • ULEB128 relocations D142879, D142880
      • As noted in #64102 we need this for compatibility with binutils
    • (submitted question, answered below) Should we backport: D154958 to llvm-17?
      • Asb: This was committed on Jul 21 so landed before the branch and is in LLVM 17
  • (Philip) Performance regression due to lost cross-block CSE (#64282)
  • (Aditya) Suboptimal instruction sequence when operands are reordered #57255
    • Allen (vfdff) abandoned the patch. Feel free to take this one.
  • AOB