Tablegen-lsp-server
The tablegen-lsp-server of MLIR is well-intentioned, but difficult to use in practice.
The lsp server needs to find the dependency path according to tablegen_compile_commands.yml.
tablegen references can only be stated in the td file. For example,
Mips.td
//===-- Mips.td - Describe the Mips Target Machine ---------*- tablegen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// This is the top level entry point for the Mips target.
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Target-independent interfaces
//===----------------------------------------------------------------------===//
include "llvm/Target/Target.td"
// The overall idea of the PredicateControl class is to chop the Predicates list
// into subsets that are usually overridden independently. This allows
// subclasses to partially override the predicates of their superclasses without
// having to re-add all the existing predicates.
class PredicateControl {
// Predicates for the encoding scheme in use such as HasStdEnc
list<Predicate> EncodingPredicates = [];
There is no problem with individual files.
However, in the back end, registers, scheduling, call constraints, and instruction implementation are usually separated into different files.
Simplified version of the td file reference relationship
The tablegen-lsp-server problem appears
Because eventually all the files will converge into Mips.td. So it compiles successfully. However, if you want to go to the definition via lspserver, for example to see the RegisterClass definition in MipsRegisterInfo.td, it is currently not possible. Because RegisterClass is defined in llvm/Target/ target.td, which is referenced by Mips.td. Therefore, llvm/Target/ target.td cannot be included in MipsRegisterInfo.td. If it is, there will be duplicate references after merging into Mips.td. Even though tablegen_compile_commands.yml indicates dependent paths, because MipsRegisterInfo.td does not contain llvm/Target/ target.td, So you still can’t use tablegen-lsp-server to go to the definition to see the Register class definition.
The result of the problem
# llvm/cmake/modules
# function(tablegen project ofn)
# Insert before line 98
# Append the includes used for this file to the tablegen_compile_commands
# file.
file(APPEND ${CMAKE_BINARY_DIR}/tablegen_compile_commands.yml
"--- !FileInfo:\n"
" filepath: \"${LLVM_TARGET_DEFINITIONS_ABSOLUTE}\"\n"
" includes: \"${CMAKE_CURRENT_SOURCE_DIR};${tblgen_includes}\"\n"
)
I tried to install MLIR plug-in in vscode and configure tablege-lsp-server. And add to Cmake to generate tablegen_compile_commands.yml. “Go to definition” still cannot be implemented for specific back-end td files in llvm/lib/Target. This bothers me when writing the td files on the back end. I need to manually keep searching and looking at the class definition.
