Register coalescing

Project Infrastructure LLVM Dev List Archives
#1

Need some guidance about the right way to model this – how would you model a backend with a handful of read-only physical registers that are passed as arguments to a function? I was emitting copyFromReg nodes in the LowerFormalArgument() routine, but then the register allocator and coalescer are resisting coalescing the COPY MI’s for various reasons - for example, the read-only register class contains too few registers and the live range threshold cancels the coalescing.

A simple example (post-ISEL):

%vreg2 = COPY %C1; GPReg:%vreg2
…
%vreg11 = MUL %vreg7, %vreg2; GPreg:%vreg11,%vreg7,%vreg2

I’d want it to propagate %C1 into the MUL, replacing %vreg2. How is this supposed to work? Is there a DAG operation or MF pass that should handle this before regalloc, or some other means?

Thanks,
Joe

#2

You should model the live-in registers like other targets do, let MachineRegisterInfo::EmitLiveInCopies() produce the copies.

Make sure the constant registers belong to the register class you are using (GPReg), otherwise coalescing is impossible.

Mark the constant registers as reserved, and RegisterCoalescer should take care of the rest.

/jakob