RISCV big endian support

Hi all, I’ve implemented RISCV big endian support - I plan to contribute it. It’s been almost ten years since I last committed anything to LLVM, so be gentle…
I’m looking for reviewers, I’ll check the git history, but if you/anyone you know are a suitable person, please let me know.
Looking forward to your remarks.

Hi Guy. A number of us have auto-subscription rules for RISC-V patches so you should get a lot of eyes on it just from that. I’m not sure if there’s anyone with a particular interest in big-endian suport.

One general comment / concern would be the extent to which the big-endian ABI is standardised and documented. See e.g. this psABI issue. It’s going to be a lot more feasible to review and merge the code if there’s an agreed ABI description.

1 Like

I agree, that having an agreed ABI definition would be nice, but I wouldn’t hold my breath until it’s in place. The spec currently talks about big-endian or bi-endian as non-standard variants, so documenting specific aspect of big-endian RISCV doesn’t seem like a high priority.
On the other hand, gcc already supports big-endian RISCV, so I guess we can aim for compatibility with their implementation.

My request isn’t so much to push something all the way through to full agreement and ratification. But creating a PR that describes the ABI as you understand it and getting agreement from other interested BE parties that it at least matches what GCC does would make it substantially easier to review LLVM patches (and I’d be fairly concerned about merging without that description). If we need to work with an unratified BE ABI because there’s no clear path to standardising it in the near-term that’s one thing, but I’d hate us to accidentally introduce a second ABI that deviates from GCC!

1 Like

Sorry I couldn’t join the meeting last Thursday, I’ll try to join the next one.
In the meantime, I’ve uploaded a code review ⚙ D128612 RISC-V big-endian support implementation with the implementation. Any remarks are most welcome.