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[RFC] Clarifying NVPTX compute capability and PTX version handling
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10
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396
|
June 12, 2026
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NVPTX: SyncScope/AtomicOrdering of atomicrmw support?
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3
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386
|
March 12, 2026
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[RFC] [DebugInfo][NVPTX] Adding support for inlined_at debug directive in NVPTX backend
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2
|
178
|
December 15, 2025
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Seeking Guidance on Executing MLIR Code with GPU Dialect on GPU
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2
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362
|
March 28, 2025
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RFC: llvm.gpu builtins for target agnostic code representation
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0
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132
|
March 13, 2025
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Offloading on nvptx64 target with flang-new leads to `Undefined reference`s
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1
|
229
|
July 22, 2024
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`nvvm.mbarrier.try_wait` behaviour
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0
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177
|
June 4, 2024
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Codegen slower with new PassManager
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4
|
315
|
February 9, 2024
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[NVPTX] tablegen errors on adding pattern for v2f16 scalar_to_vector f16
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2
|
225
|
January 29, 2024
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NVPTX instruction selection for loads depending on known bits
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5
|
436
|
January 23, 2024
|
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[NVPTX] Is a loop reroller useful?
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4
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433
|
November 9, 2023
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Flang name mangling for enabling OpenMP NVPTX backend
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8
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424
|
November 6, 2023
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How to implement vectorloadStore pass for a new GPU backend?
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1
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411
|
June 28, 2023
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[RFC] Cleaning up the NVIDIA (and potentially AMD) GPU backend
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5
|
701
|
June 29, 2023
|
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NVPTX problems with dynamic alloca
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|
1
|
435
|
May 19, 2023
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NVPTX: Calling convention for aggregate arguments passed by value
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|
13
|
994
|
January 24, 2022
|