It’s not more information, it’s a fundamental part of the value.
The NVPTX alloca handling is basically an old hack to avoid changing the IR to keep alloca producing a generic pointer where the value is really allocated in ADDRESS_SPACE_LOCAL. NVPTXLowerAlloca introduces a pair of casts to hack in some of the optimization benefit of the specific address space. Really replacing the address space of the value requires transitively rewriting all users
Thanks! This conflicts somewhat with my intuition for optimizing CUDA programs. For instance, when I use a shared-memory to accelerate repeated memory access, the pointer which points to shared memory in llvm ir will be converted to a generic pointer. However, it works.