Topics tagged riscv

Topic	Replies	Views	Activity
Per Processor Costing for RISCV RISCV riscv , llvm	9	264	August 19, 2026
[RFC] Add a @llvm.mask.beforefirst intrinsic, and when should we create a new intrinsic? IR & Optimizations arm64 , riscv , llvm	3	150	August 17, 2026
Poor optimization of memory access to (no-byval indirect) aggregate value arguments IR & Optimizations riscv , clang	2	328	July 28, 2026
[RFC] Remove trivial VP intrinsics IR & Optimizations riscv , ve , llvm	18	583	July 28, 2026
Lnt.llvm.org now tracking RVA23U64 performance for Clang and GCC on SpacemiT-X100 Project Infrastructure riscv , clang	0	109	July 16, 2026
[RFC] Add RISE RISC-V Runners GitHub riscv , libc	8	302	June 12, 2026
Requesting reviews on issue #119556 Code Review riscv	1	122	June 5, 2026
Beijing LLVM Meetup, May 29, 2026 LLVM Project riscv , mlir	1	194	May 25, 2026
Merging RISCVToolChain and BareMetal toolchains Clang Frontend riscv , clang	8	934	May 4, 2026
[RFC] RVCC: An LLVM Incubator for High-Performance RISC-V Compiler Optimizations Incubator riscv	18	1231	April 24, 2026
Promoting load/something/store to atomics on single-hart virtual target RISCV riscv	2	110	April 17, 2026
[RFC] RISC-V ropi-rwpi profile with gp-based runtime data addressing RISCV riscv , llvm	5	275	April 2, 2026
Beating -Oz for a specific codebase Beginners riscv , llvm	5	419	March 25, 2026
Beijing LLVM Meetup, March 20, 2026 LLVM Project riscv , jit	0	155	March 13, 2026
TVM + LLVM flow for custom NPU: Where should the Conv2d tiling and memory management logic reside? IR & Optimizations riscv , llvm	0	104	February 24, 2026
[Funded PhD] Intelligent Compilation Infrastructure for Scientific Simulation (LLVM/MLIR/HPC) @ UTS, Sydney Job Postings gpu , riscv , clang , llvm , mlir	0	220	February 11, 2026
How to add a register only custom datatype Clang Frontend riscv , clang , llvm	0	50	February 3, 2026
Israel LLVM Meetup Group - February 18th 2026 Community riscv , clang , llvm , mlir	0	134	February 3, 2026
Beijing LLVM Meetup LLVM Project riscv , llvm	0	166	January 29, 2026
Help with building compiler-rt for RISCV target Runtimes riscv , llvm	9	254	January 18, 2026
Beijing LLVM Tech Meetup LLVM Project riscv , llvm	0	114	January 6, 2026
Search path of libclang_rt.profile.a Using Clang riscv , clang	0	93	December 31, 2025
Optimizing Load-multiple and Store-multiple on LLVM RISCV riscv , llvm	1	243	December 22, 2025
Senior LLVM Compiler Developer(s) @ Ubitium, Germany Job Postings riscv , llvm	0	287	December 3, 2025
LLVM backed for handling UMUL8 and UMUL16 for PSIMD RISC-v RISCV riscv , llvm	0	66	December 2, 2025
RISC-V Roundtable Meeting Notes US Developer Meeting riscv	4	348	November 3, 2025
[RFC]Modify RegMask Settings of Scalar Library Functions to Reduce Spills RISCV riscv , llvm	1	135	October 14, 2025
TableGen custom Instruction "Operand not declared in matcher" Code Generation riscv , llvm	7	284	September 19, 2025
[RFC] New analysis for Polynomial Hash recognition Loop Optimizations riscv , llvm	4	565	September 8, 2025
Dynamically adding/loading RISC-V (custom) instruction information during runtime LLVM Project riscv , clang , llvm	3	243	August 27, 2025